FOUR LAYERS. ONE CONNECTED PROCESS.Preparing your design files
Four-layer engineering

4 Layer PCB Stackup

A four-layer stackup is a physical construction and an electrical plan. Assigning names to four copper layers is only the starting point. The dielectric spacing, copper thickness, reference continuity and available material construction determine whether the plan supports the circuit you intend to build.

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Separate layer assignment from physical construction

A layer assignment describes where signals, ground and power will go. The physical construction adds the core and bonding layers, copper thicknesses, material system and finished thickness requirements. Both are necessary: a drawing labeled signal-ground-power-signal does not provide enough information to manufacture a controlled electrical geometry.

Begin with the interfaces and power paths that impose the strongest constraints. Identify fast edges, sensitive analog nodes, switching loops and mechanically fixed connectors. Then decide which layers need continuous reference areas and which can carry routed power.

Request a proposed construction before finalizing critical trace widths. Starting from a convenient CAD default and asking the manufacturer to reproduce it later can create avoidable changes. A manufacturable stackup should be confirmed using available materials and the actual design requirements.

Compare common four-layer arrangements

A signal-ground-power-signal arrangement provides two outer routing layers and dedicated internal functions. Its suitability depends on the continuity of each reference area, power distribution and transitions between layers. A bottom-layer signal above a fragmented power layer deserves explicit review; the label “power plane” does not make every region a suitable reference.

A signal-ground-ground-signal arrangement can provide nearby ground references to both outer routing layers, while power is distributed through suitable traces or pours. It may work well when power routing remains manageable. It is not automatically superior for every current demand or component density.

Other assignments are possible, but evaluate the full geometry and return paths. The table describes design questions rather than a catalog of approved production stackups. Select and validate a construction for the specific board.

DecisionWhat to defineWhy it matters
Signal / ground / power / signalContinuity of both referencesPower splits can constrain bottom routing
Signal / ground / ground / signalPower routing and plane connectionsKeeps both outer references explicit
Finished thicknessMechanical fit and toleranceNominal thickness alone is incomplete
Critical dielectric spacingManufactured constructionControls geometry-sensitive behavior
Layer transitionReference before and after the viaMaintains a considered return path

Follow return current through every transition

A signal path includes the conductor and its return path. At fast transitions, the nearby reference geometry strongly influences that path. A continuous reference area helps maintain a compact loop; splits, voids and large detours can increase coupling and change impedance.

When a signal changes layers, examine which reference it uses before and after the transition. A nearby ground connection can support a transition between ground-referenced regions, but it does not solve every change between different reference nets. Review the relevant decoupling and return structure rather than adding vias without understanding their purpose.

Illustrative example: a clock routed on the top layer over solid ground is moved to the bottom to bypass a connector. The review must include the bottom reference and the transition, not just the clock’s total length or trace width.

L1Signal + components
Prepreg dielectric
L2Ground reference
Core dielectric
L3Power or ground
Prepreg dielectric
L4Signal + components
Illustrative four-layer construction. Layer assignments and dielectric dimensions are confirmed for each design.

Make thickness and impedance requirements consistent

Finished board thickness combines copper and dielectric construction, with process details affecting the final result. Core thickness, prepreg style, resin content and copper distribution influence the pressed structure. A simple arithmetic stackup is useful for planning but cannot establish the actual manufactured dielectric thickness.

For controlled impedance, specify the target, tolerance, relevant layers, trace style and any intended test requirement. The engineering review can then connect those requirements to an achievable geometry. Do not assume that one trace width gives the same impedance on all nominally identical four-layer boards.

Mechanical requirements remain part of this conversation. Edge connectors, press-fit features and enclosure slots may constrain finished thickness independently of electrical needs. Identify those constraints early so an impedance adjustment does not quietly create a mechanical fit problem.

Balance electrical intent with manufacturability

A practical stackup also considers copper distribution, lamination behavior, hole construction and dimensional stability. Large differences between opposing copper patterns or dielectric regions can complicate the manufacturing assessment. Mechanical balance is a design consideration, but it is not a substitute for reviewing the actual artwork.

Coordinate plane clearances and routed features with drill and registration requirements. A plane that looks continuous in a schematic block diagram may be heavily interrupted by connector antipads. Inspect narrow reference corridors around dense through-hole fields and mounting features.

When a proposed stackup changes, identify which design rules need updating. Trace widths, spacings, via structures and impedance assumptions may all be affected. Keep the approved stackup with the released files and preserve its revision so later orders can be compared with the tested board.

Submit a stackup request that enables a clear answer

Provide the layer count, outline, finished thickness requirement, copper expectations and material restrictions. Add the critical interfaces, impedance targets, highest relevant operating conditions and any hole structures that influence the construction. Explain whether total thickness or electrical geometry has priority if a tradeoff is necessary.

Use an illustrative cross-section to communicate intent, but label it as a proposal until reviewed. The stackup tool can help visualize layer roles and add geometric thicknesses; it does not select stocked material, predict pressed resin flow or validate signal integrity.

Request an engineering review before freezing routing that depends on unconfirmed dimensions. A useful outcome is an agreed construction, associated design rules and a list of acceptance checks. That documented result becomes the common reference for layout, fabrication, testing and future production changes.

PROJECT WORKSPACE

4 Layer PCB Stackup readiness checklist

Use this checklist to prepare your inquiry. These selections stay in this browser and do not submit a project.

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Frequently asked questions

Is there one standard four-layer stackup?

No single construction covers every manufacturer and design. Layer roles can be similar while dielectric spacing, materials and copper differ. Obtain a proposed construction for the actual requirements.

Do I always need a dedicated power plane?

No. Some designs can distribute power through suitable traces and pours while using two ground reference layers. Assess current paths, voltage drop, decoupling and routing space before choosing.

Can I calculate finished thickness by adding layers?

You can make a planning estimate. Actual construction also depends on pressed dielectric behavior and specified manufacturing tolerances. Confirm the finished requirement with the fabrication review.

Can a signal cross a split plane?

A split can interrupt the intended return path and create an impedance discontinuity. Review the signal and reference geometry; rerouting over a continuous reference is often the more direct remedy.

Does a four-layer stackup guarantee good EMC?

No. Placement, current loops, interfaces, return paths, enclosure and cabling still matter. A suitable stackup supports good design but does not replace system-level evaluation.

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